For example, JP09-135155A describes a semiconductor device that has a switching element constituting a three-phase inverter as a main circuit and a snubber circuit connected to the switching element as a sub circuit. A diode and a resistor of the snubber circuit are mounted on a sub circuit board, and a main circuit board is arranged adjacent to the sub circuit board so as to restrict an increase in temperature of the main circuit board.
However, in a case where the snubber circuit and the main circuit are mounted on separate circuit boards, a parasitic inductance of the snubber circuit is likely to increase. On the other hand, if the snubber circuit is disposed adjacent to the main circuit as much as possible so as to reduce the parasitic inductance, although the size of the snubber circuit can be reduced, it is necessary to consider heat generation from the resistor of the snubber circuit.